Integrated circuit chips are known that are provided with electrical connection means which comprise electrical connection vias formed in holes passing through the substrate, on a front face of which the integrated circuits are formed, in order to produce electrical connections on the rear, that is to say opposite the side where the integrated circuits are situated, these electrical connection vias being provided with rear electrical connection pillars. The rear face of the substrate and the vias are covered with a permanent passivation layer made of a photosensitive polymer, through which the rear electrical connection pillars are formed by using non-permanent conductive layers on this passivation layer. Consequently, the fabrication methods implemented comprise a large number of steps in particular because of the existence of the passivation layer. Furthermore, the passivation layer cannot completely fill the central hole remaining in the vias even though there is a risk of internal oxidation of the electrical connection vias.